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Performance analysis of FET-based Universal gates in multi-valued logic

Document Type : Original Article

Authors

1 Department of Electric Engineering, University of Science and Culture, Tehran, Iran

2 University of Science and Culture

Abstract

This paper explores the advancements in Multi-Valued Logic (MVL) circuits, contrasting them with conventional binary logic systems. The paper discusses how MVL circuits improves the performance of logic circuits. The focus then shifts to emerging technologies for logic gate design based on carbon allotrope such as CNTFETs and (Graphene    Nanoribbon Field Emission Transistors) GNRFETs. The paper analyzes the structure and operating principles of these transistors, providing a comparative analysis of their power consumption, switching speed, scalability, and manufacturing complexity. Specifically, the study investigates the performance of ternary and Quaternary Universal gates implemented using GNRFETs and CNTFETs. Moreover, in this article some other edge of knowledge technology like FinFETs circuits is explored to have a comprehensive view on the performance, advantage and disadvantage of MVL circuits. Results indicate that GNRFET-based designs demonstrate lower delay and significantly better energy efficiency compared to FinFETs and CNTFETs, despite some challenges with higher power consumption in certain GNRFET implementations.

Keywords

References
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Computational Sciences and Engineering
Volume 5, Issue 1
April 2025
Pages 115-137
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